Formal Methods for Hardware Verification:  6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems SFM 2006

Formal Methods for Hardware Verification: 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems SFM 2006

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Aug 26, 2008 · 英語 · ペーパーバック (260 ページ)
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形式 ペーパーバック
ページ数 260
言語 英語
公開されました Aug 26, 2008
出版社 Springer
ISBN-10 3540824111
ISBN-13 9783540824114

説明

This book presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, and more.
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