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Defect and Fault Tolerance in VLSI Systems: Volume 2

Defect and Fault Tolerance in VLSI Systems: Volume 2

C H Stapper

Logic and Architecture Synthesis

Logic and Architecture Synthesis

Gabriele Saucier

Synthesis for Control Dominated Circuits

Synthesis for Control Dominated Circuits

Gabriele Saucier

Logic and Architecture Synthesis: Proceedings of the Ifip Tc10/Wg10.5 Workshop on Logic and Architecture Synthesis, Paris, France, 30 May-1 June 199

Logic and Architecture Synthesis: Proceedings of the Ifip Tc10/Wg10.5 Workshop on Logic and Architecture Synthesis, Paris, France, 30 May-1 June 199

Petra Michel

Fast Prototyping of Vlsi: Selection of Papers from the Ifip Wg 10.5 Workshop on Fast Prototyping, Grenoble, France, 17-19 March 1987

Fast Prototyping of Vlsi: Selection of Papers from the Ifip Wg 10.5 Workshop on Fast Prototyping, Grenoble, France, 17-19 March 1987

Gabriele Saucier

Logic and Architecture Synthesis for Silicon Compilers: Proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Co

Logic and Architecture Synthesis for Silicon Compilers: Proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Co

Gabriele Saucier