Niraj K. Jhaの本 - BookPine

Nanoelectronic Circuit Design

Nanoelectronic Circuit Design

Niraj K. Jha

Testing of Digital Systems

Testing of Digital Systems

Niraj K. Jha

High-Level Power Analysis and Optimization

High-Level Power Analysis and Optimization

Anand Raghunathan

Testing and Reliable Design of CMOS Circuits

Testing and Reliable Design of CMOS Circuits

Niraj K. Jha

Research Methodology

Research Methodology

Niraj K. Jha

Switching Finite Auto Theory

Switching Finite Auto Theory

Zvi Kohavi

Switching and Finite Automata Theory

Switching and Finite Automata Theory

Niraj K. Jha

Switching Finite Auto Theory 3ed

Switching Finite Auto Theory 3ed

Zvi Kohavi

Embedded and Ubiquitous Computing: International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings

Embedded and Ubiquitous Computing: International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings

Laurence T. Yang

Fault Tolerant Parallel Computing in Orthogonal Shared-Memory and Related Architectures

Fault Tolerant Parallel Computing in Orthogonal Shared-Memory and Related Architectures

Niraj K. Jha

[(Testing and Reliable Design of CMOS Circuits * * )] [Author: N. K. Jha] [Feb-1990]

[(Testing and Reliable Design of CMOS Circuits * * )] [Author: N. K. Jha] [Feb-1990]

Niraj K. Jha

Testing of Digital Systems by Jha, N. K., Gupta, S. (2003) Hardcover

Testing of Digital Systems by Jha, N. K., Gupta, S. (2003) Hardcover

Niraj K. Jha